Novel Subthreshold and Gate Leakage Reduction Techniques for 6T-SRAM Cell
نویسنده
چکیده
Power has been an important issue for the present day microelectronic circuits of Soc designs. In the entire phase of design controlling power and dealing with power dissipation is very important. There are six leakage components in a MOS transistor. About 50 % of the total power consumption is through leakage components alone. Out of this 40 % power dissipation is through transistors.Out of them subthreshold leakage and gate leakage are of important concern for sub 100 nm devices. In this work we presented the main leakages in a 6TSRAM cell. Later we presented an existing variable body biasing method and its performance. We proposed two novel methodologies HSVR, GSVE to reduce the subthreshold and gate leakage components. These methods are toplogy based leakage reduction methods applied for leakage reduction in the circuit level.We observed considerable reduction of both the components through the proposed methods. Keywords—SRAM, Leakage, Gate Leakage, subthresholdleakage
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